Generally, semiconductor devices include a plurality of circuits which form an integrated circuit (IC) fabricated on a semiconductor substrate. A complex network of signal paths will normally be routed to connect the circuit elements distributed on the surface of the substrate. Efficient routing of these signals across the device requires formation of multilevel or multilayered schemes, such as, for example, single or dual damascene wiring structures. The wiring structure typically includes copper, Cu, since Cu based interconnects provide higher speed signal transmission between large numbers of transistors on a complex semiconductor chip as compared with aluminum, Al, based interconnects.
Within a typical interconnect structure, metal vias run perpendicular to the semiconductor substrate and metal lines run parallel to the semiconductor substrate. Further enhancement of the signal speed and reduction of signals in adjacent metal lines (known as “crosstalk”) are achieved in today's IC product chips by embedding the metal lines and metal vias (e.g., conductive features) in a dielectric material having a dielectric constant of less than 4.0.
With continuous scaling and introduction of low k (on the order of less than 4.0) dielectrics in Cu interconnects, reliability issues have become a greater concern in addition to increased process complexity. One reliability issue that is a concern in current Cu based interconnect structures (as well as other metal based interconnect structures) is caused by the weak mechanical interface at the cap/dielectric/barrier interface.
FIG. 1A is a cross sectional view of a prior art interconnect structure showing the mechanically weak interface. Specifically, the prior art interconnect structure 10 shown in FIG. 1A comprises a dielectric material 12 having a dielectric constant of about 4.0 or less. Embedded within the dielectric material 12 is a conductive (e.g., Cu) material 16 that is separated from the dielectric material 12 by a diffusion barrier 14. A capping layer 18 is located atop the dielectric material 12 as well as upper portions of the diffusion barrier 14 and on the conductive material 16. The prior art interconnect structure 10 is mechanically weak at the triple interface that is formed between the capping layer 18/dielectric material 12/diffusion barrier 14. The mechanically weak interface is denoted by reference numeral 20.
Besides the reliability issues caused by the mechanically weak interface, conductive material 16 eventually diffuses into the dielectric material 12 and causes reliability degradation of the circuit. This problem is illustrated in the SEM shown in FIG. 1B. The diffusion of conductive material to the dielectric material 12 occurs readily in the absence of the diffusion barrier 14 under the influence of an electrical field. Similarly, it has also been observed that the conductive material 16, particularly Cu ions, can diffuse into the dielectric material 12 along the conductive material 16/capping layer 18 interface under normal circuit operations. This is shown, for example, in FIG. 1C where reference numeral 22 denotes the direction of the diffusion.
In view of the above, there is a need for providing a new and improved interconnect structure wherein the above-mentioned drawbacks with prior art interconnect structures have been substantially eliminated.